1. Field of the Invention
This invention relates to an apparatus for capturing an image, and particularly relates to apparatus utilizing serial-output analog-to-digital converter (A/D converter) for capturing image.
2. Description of the Prior Art
The volume of the consuming electronic product has shrunk in the last decade, and the development of electronic technology makes it possible to further reduce the volume of an electronic apparatus. Especially in the recent years, the trend of shrinking the volume of the electronic apparatus has gone on, and many possible methods have been tried to reduce the volume of the electronic apparatus. Because the volume of a computer is continuously reduced with the advent of technology, it also has been a trend for designers of the computer peripheral device to reduce its volume due to the popularity of the portable computer. Thus the reduction of volume has become a trend when designing an electronic apparatus. So it is a goal for the designer of a computer peripheral device to reduce the volume of the periphery device, and many possible methods are tried to reduce the volume of a computer peripheral device.
In fabricating a computer peripheral device, such as an image scanner, a serial-in parallel-out analog-to-digital (A/D) converter is used to convert the electric image signal from analog format to digital format. Referring to FIG. 1, an image sensor 10 is driven by a sensor drive circuit 12 to scan an object, such as a picture, so the image of the object is converted to an electrical signal. The electrical signal acquired by the image sensor 10 is a signal of the analog format. Then an amplifier 14 amplifies the power of the electrical signal, and the amplified electrical signal is fed to the A/D converter 16. The foregoing A/D converter 16 samples the electrical signal of the image of an analog format according to a reference level, thus acquiring a digital format image signal. So the amplified electrical signal of the analog format is converted to the digital format by the A/D converter 16.
In other words, the A/D converter 16 determines the value (in digital format) of every pixel of the image in accordance with the sampling-reference voltage generated by the reference level generator. In a scanner, a D/A (digital-to-analog) converter 18 is used as the reference level generator mentioned above. After the analog format electrical signal is sampled to obtain the digital format electrical signal, the digital format electrical signal is fed to an ASIC (application specific integrated circuit) 20. And then the ASIC 20 sends the acquired digital electrical signal to the memory 22, thus the image of the picture is obtained and stored in the memory 22. In the traditional scanner, the A/D converter 16 a is parallel-output apparatus, so there must be many transmission lines connecting the ASIC 20 to the A/D converter 16.
In a practical integrated circuit of the A/D converter 16, there is a specific number of output-pins that transmit the digital electrical signal, and the ASIC 20 has a number of corresponding input-pins that receive the digital electrical signal from the A/D converter 16. In addition, a corresponding number of transmission lines must be fabricated on a printed circuit board (PCB) to connect the output-pins of the A/D converter 16 and the input-pins of the ASIC 20. The PCB (not shown) is the practical circuit board on which the practical circuit of every functional block shown in FIG. 1 can be fabricated.
In another respect, it is known that while displaying an image in an image system, if more shades can be selected to compose every pixel of the displayed image, the displayed image mentioned above can approach much more alike the original image. In addition, the contrast of the displayed image can be bettered. In other words, the quality of the output image can be improved by increasing the shade of the image acquiring system. To improve the quality of the output image, it is important to increase the density range of the image scanner because it will make possible the situation in which every pixel has more chosen shades.
One of important factor in the quality of the output image of the image acquiring system is the density range of the image acquiring system and image sensor. The other important factor to the quality of the output image of the image acquiring system is the number of bits of the digital electrical signal. Assume that the number of bits of the digital electrical signal is 12 then the signal-to-noise ratio (S/N) is (212)/1=4096, so the density range D=log4096=9.6. So it is clear that the larger the bit number the image signal becomes, the larger the density range becomes. Therefore, if more bits are used to represent a pixel, there are more shades which can be selected in every pixel on the reconstructed output image. Thus the quality of the output image of the image acquiring system is improved thereby.
Though the increase of bit number can improve the image quality of the output image of the image acquiring system, the increased bit number will result in the increase of the pin number of the D/A converter 16 and the ASIC 20. Simultaneously, the increment of the pin number of the D/A converter 16 and the ASIC 20 induces the growth of the number of the transmission lines on the PCB; thus the extension of the area of the PCB is necessary. When more bits are used to represent a pixel of a digital electrical signal, the volume of the image acquiring system is enlarged for the reason mentioned above. So the trade off between the volume of the traditional image acquiring system and the output image quality is unavoidable in the prior art.
In order to shrink the volume of the image acquiring system, according to the preferred embodiment of the present invention, the apparatus for acquiring an image-utilizing serial transmission between the analog-to-digital converting means and the processing means (ASIC) is disclosed herein. The image acquiring system according to the preferred embodiment of the present invention includes the following devices.
The image sensor converts an image to an electrical signal responding to a trigger signal. An amplifier amplifies the power of the electrical signal mentioned above, and the amplified electrical signal is of the analog format. The A/D converting device converts the amplified electrical signal from the analog format to the digital format responding to a reference voltage, wherein the A/D converting device outputs the digitized electrical signal in series. The processing device stores the digitized electrical signal in a memory, wherein the trigger signal is generated by the processing device responding to the digitized electrical signal. The reference voltage mentioned above is generated corresponding to a reference digit, wherein the reference digit is generated responding to the digitized electrical signal, in addition, the digitized electrical signal being transmitted to the processing means in series.
Furthermore, the image acquiring apparatus according to the preferred embodiment of the present invention further includes a sensor driving device that drives the image sensor responding to the trigger signal. In addition, the image acquiring apparatus includes a digital-to-analog (D/A) converting device that generates the reference voltage according to the reference digit.
The analog-to-digital (A/D) converting device comprises an analog-to-digital converts that converting the amplified electrical from the analog format to the digital format by comparing the amplified electrical signal with the reference voltage, wherein the analog-to-digital converter outputs the signal in parallel. In addition, the A/D converting device includes a parallel-in serial-out register that serially transmitting parallel output of the A/D converter to the processing device responding to a clock pulse. The A/D converting device further includes a controlling device for arranging the digitized electrical signal generated by the analog-to-digital converter in parallel transmission responding to an analog-to-digital clock pulse. The foregoing clock pulse and the analog-to-digital clock pulse are generated by the processing device.
The parallel-in serial-out (PISO) register comprises a shift register and a multiplexer. The shift register controlled by the analog-to-digital clock pulse registers the parallel transmitted digitized electrical signal. The multiplexer arranges the parallel transmitted digitized electrical signal registered in the shift register in serial transmission responding to the output of a serial connected toggle flip flops. The serial connected toggle flip flops are controlled by the analog-to-digital clock pulse and the clock pulse.
The processing device includes a serial-in parallel-out register and a processor (ASIC). The serial-in parallel-out register arranges the digitized electrical signal transmitted by the A/D converting device in parallel transmission responding to the A/D clock pulse and the clock pulse. The processor stores the digitized electrical signal in the memory, wherein the processor generates the analog-to-digital clock pulse and the clock pulse. The processor can be an ASIC. The serial-in parallel-out register includes a set of first serial connected delay flip flops and a set of second serial connected delay flip flops. The first serial connected delay flip flops arrange the digitized electrical signal transmitted by the analog-to-digital converting device in parallel transmission responding to the clock pulse. The second serial connected delay flip flops arrange the output signal from the first serial connected delay flip flops in parallel transmission responding to the A/D clock pulse.